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IC Layout Design & Verification Program
San Jose 1762 Technology dr.suite 228
8 years, 7 months
Ad ID:ADOIST-1269428
Category:Services
Subcategory:Education
Description
IC Layout Design & Verification The most comprehensive IC Layout training programs in the industry, this program`- explores semiconductor process technologies from 0.18um BCD down to 23nm -14nm and covers Custom Analog, Digital, and Mixed-Signal layout skills. Class assignments and practice examples are realistic and are taken from actual design projects.
We welcome and accept: Corporate Tuition Reimbursement, Workers Compensation, California Training Benefit (CTB), Trade Adjustment Act (TAA), Workforce Investment Act (WIA), Vocational Rehab, and more... For more information please contact Silicon Valley Polytechnic Institute; info@svpti.com or call 408-436-3000.
San Jose, 3163 Loma Verde Drive, Unit 10, San Jose, CA 951
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